A radio receiver may be used to recover a “baseband” signal (e.g., a radio signal having a first frequency) from transmitted data (e.g., typically having a second frequency different from, and oftentimes higher than, the first frequency). In some cases, the baseband signal may include frequencies near 0 Hz. For example, in real-time clock applications, the baseband signal frequency is generally about 1 Hz.
In some wireless communication signal systems, transmitted signals can include original low frequency radio signal portions that are modulated to the higher transmitted carrier frequencies (e.g., in a radio-frequency [RF] signal) for transmission. Such original low frequency components (i.e., the baseband radio signal) can then be converted or recovered from the relatively high frequency components by using a radio receiver. In a typical conversion to baseband signal frequencies, one or two mixers or multiplier circuits can be used for a “direct down” conversion approach where incoming data (e.g., a radio signal) is directly converted from the transmission frequency or broadcast channel (e.g., typically from about 40 to about 60 kHz) to the baseband frequency (e.g., about 1 Hz) in a receiver.
Modern AM radio receiver architectures are generally either “heterodyne” or “direct” conversion. For example, heterodyne receivers include generators of new frequencies (e.g., intermediate frequencies [IF]) by mixing two or more signals in a nonlinear device (e.g., a transistor). Typically, direct conversion is preferred for relatively simple baseband demodulation schemes, while IF with a heterodyne receiver is preferred for more complex demodulation schemes. FIG. 1 shows a block level of a conventional direct conversion scheme commonly used for AM demodulation. An AM modulated signal (RF input, e.g., a sine wave) with a “carrier” frequency (Fc) is amplified by amplifier 104 (e.g., a low noise amplifier [LNA]), and fed to mixers 106 and 118. Phase locked loop (PLL) 114 is used to generate a local oscillation (LO) signal 120 at the carrier frequency, Fc. The IQ generator 116 generates in-phase (I) and quadrature (Q) clocks (e.g., signals 122 and 124, also at frequency Fc), which may then be mixed with the amplified RF signal. For example, mixer 118 is used as a phase detector for the PLL loop to enable PLL 114 to synchronize the reference clock with the received RF signal. Further, mixer 106 may produce sum and difference frequencies of the amplified RF input signal and LO signal 120. The low frequency resultant signal (e.g., the difference of the frequencies of the RF input signal and LO signal 120) is the baseband signal 112 of the AM modulation, which may be extracted from the mixer output using a low pass filter (LPF) 108. Thus, LPF 108 may be used to allow the low frequency difference signal to pass through, while blocking the higher frequency summation frequency. Baseband signal 112 may then be converted into a digital signal using decoder 110. Further, the gain of amplifier 104 can be adjusted using automatic gain control (AGC) circuit 102 in order to obtain a more faithful reproduction of the transmitted baseband signal.
FIG. 2 shows decoder input (signal 112) and output signals for the conventional direct conversion scheme of FIG. 1. As shown, threshold 202 (along with the slew rate of signal 112) determines the duty cycle of the decoder output digital signal relative to the decoder input waveform. Typically, a CMOS inverter or buffer is used as a decoder, where the amplitude of the input signal to the decoder has to be relatively large in order to improve performance. Thus, a larger gain along the signal path from amplifier 104 to LPF 108 may also be needed to generate a suitably large amplitude at input signal 112. Generating such larger signal gains generally results in increased power consumption in the system. Therefore, such a conventional approach may not be desirable in power sensitive applications, such as handheld devices.